Sigrity is the most proven modeling, signal and power integrity analysis tool for PCB and IC.
Sigrity gives the high-speed designer everything that is needed. It is the most powerful, high end interconnect modeling, signal and power integrity simulation for PCB and IC.
With Cadence® Sigrity™ PowerDC™, you get added accuracy of electrical/thermal co-simulation, as well as the assurance that your PDN performs as expected. With PowerDC, you can easily locate accidental voltage losses, high current densities, via with excessive currents and thermal hotspots. All these effects can significantly affect the quality of the design and limit the life of the product.
With Cadence® Sigrity™ OptimizePI™, you get insight into how the PDN frequency characteristics look for each individual component, including the planes shape and placement in the stackup, decoupling their routing and placement, as well as routing from supply plans to components. Decouplings can also be optimised in terms of price vs. performance and verify EMI performance by measuring impedance for self-selected locations on the layout.
Perform chip-to-chip analysis on your High-Speed SerDes interfaces, such as PCI Express® (PCIe®), HDMI, SFP+, Xaui, Infiniband, SAS, SATA, and USB with industry-standard IBIS AMI models. You can perform pre-layout analyses using templates and along the way add models of component packages, connectors, and layouts to reflect the entire interface. Simulations can be used to identify crosstalk problems and show not only the signals in the interface, but also signals after clock and data recovery (CDR), which are described in the IBIS AMI model. By simulating the complete interface with millions of bits, the overall bit error rate (BER) can be calculated to determine whether jitter and noise levels are within specified tolerances.
